An efficient memory cell should complete routine operations within a minimum amount of time. One way of improving a memory cell's efficiency is to apply a high voltage to the memory cell so that it takes less time, e.g., to erase the content stored in the memory cell. However, a high voltage applied to the memory cell may damage the gate oxide of the memory cell and therefore reduce the memory cell's durability. A more durable memory cell is especially advantageous to storage devices like electrically erasable programmable read-only memory (EEPROM) and flash memory, which are widely used in various embedded applications such as field-programmable gate arrays (FPGA) or complex programmable logic device (CPLD). Accordingly, it is desirable to develop a new memory cell structure that is both efficient and durable.